Monthly Archives: June 2015

Au-free AlGaN/GaN heterostructure field-effect transistor with recessed overhang ohmic contacts using a Ti/Al bilayer

We have developed a low-temperature ohmic contact process with a recessed overhang configuration for Au-free (complementary metal-oxide semiconductor) CMOS-compatible AlGaN/GaN heterostructure field effect transistors (HFETs). The recessed overhang configuration has a Ti/Al bilayer directly in contact with the AlGaN/GaN heterojunction interface at the recessed sidewall overlaid with the AlGaN barrier layer, which allows good and reproducible ohmic formation with low-temperature annealing. The optimum Ti/Al thickness was 40/200 nm, which resulted in an R c of 0.76 Ω mm with excellent surface morphology when annealed at 550 °C for 1 min. The device fabricated with a Ni/Mo gate exhibited a maximum drain current density of ∼500 mA mm −1 , a specific on-resistance of 1.35 m Ω cm 2 and a breakdown voltage of >1 kV.

A Study on the Degradation of In-Ga–Zn-O Thin-Film Transistors Under Current Stress by Local Variations in Density of States and Trapped Charge Distribution

Thin-film transistors using In-Ga–Zn-O (IGZO) semiconductors were evaluated under current stress by applying positive voltages to the gate and drain electrodes. Initially, the transfer characteristics exhibit identical threshold voltages ( $V_{T})$ when the source and drain electrodes are interchanged during measurement (forward and reverse $V_{mathrm {DS}}$ sweep). However, as stress time increases, larger shifts in $V_{T}$ are observed under forward $V_{mathrm {DS}}$ sweep than under reverse $V_{mathrm {DS}}$ sweep conditions. Subgap states analyses based on the photoresponse of capacitance-voltage ( $C$ – $V$ ) curves suggest that local annihilation of donor-like traps occurs near the drain electrode. Hump-like features are clearly observed in the $C$ – $V$ curves collected between the drain and gate electrodes, while they do not appear in the $C$ – $V$ data obtained between the source and the gate. Based on the above, a local charge trapping model is introduced in order to interpret the device degradation. In this model, the major carrier electrons are trapped more abundantly near the source electrode due to the presence of a Schottky junction betw- en IGZO and the source/drain electrodes.

InGaZnO Thin-Film Transistors Modified by Self-Assembled Monolayer With Different Alkyl Chain Length

InGaZnO (IGZO) thin-film transistors (TFTs) modified by self-assembled monolayers (SAMs) based on triethoxysilane (TES) with three different alkyl chain lengths were fabricated and the relationship between the SAM chain length and the TFT electrical properties was investigated. The mobility increased and the hysteresis of transfer curves was reduced after SAM-modification, owing to less adsorption/ desorption effect on the IGZO surface. IGZO-TFTs modified by TES with longer alkyl chain lengths exhibited better electrical performance, which was attributed to the formation of a more hydrophobic and higher ordered monolayer due to the cohesive interaction between the molecules.

Single-stage fully recycling folded cascode OTA for switched-capacitor circuits

A single-stage multi-path operational transconductance amplifier (OTA) is presented. The proposed amplifier uses the transconductance enhancing technique in an upgraded folded cascode (FC) amplifier. It significantly improves the DC gain, unity-gain bandwidth and slew rate compared with previous FC amplifiers with the same power consumption. Simulation results in 90 nm complementary metal-oxide semiconductor (CMOS) technology show that the proposed OTA achieves a 59.1 dB DC gain and a gain bandwidth of 650 MHz, which makes it suitable for fast-settling switched-capacitor circuits.

Indium-zinc-oxide electric-double-layer thin-film transistors gated by silane coupling agents 3-triethoxysilylpropylamine–graphene oxide solid electrolyte

Silane coupling agents 3-triethoxysilylpropyla-mine-graphene oxide (KH550-GO) solid electrolyte are prepared by spin coating process. A high proton conductivity of ~1.2   ×   10 −3 Scm −1 is obtained at room temperature. A strong electric-double-layer (EDL) effect is observed due to the accumulation of protons at KH550-GO/IZO interface. Indium-Zinc-Oxide thin film transistors gated by KH550-GO solid electrolyte are self-assembled on ITO glass substrates. Good electrical performances are obtained, such as a low subthreshold swing of ~140 mV/dec., a high current on/off ratio of ~2.9   ×   10 7 and a high field-effect mobility of ~13.2 cm 2 V −1 S −1 , respectively.

Channel length dependence of negative-bias-illumination-stress in amorphous-indium-gallium-zinc-oxide thin-film transistors

We have investigated the dependence of Negative-Bias-illumination-Stress (NBIS) upon channel length, in amorphous-indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs). The negative shift of the transfer characteristic associated with NBIS decreases for increasing channel length and is practically suppressed in devices with L = 100-μm. The effect is consistent with creation of donor defects, mainly in the channel regions adjacent to source and drain contacts. Excellent agreement with experiment has been obtained by an analytical treatment, approximating the distribution of donors in the active layer by a double exponential with characteristic length LD ∼ Ln ∼ 10-μm, the latter being the electron diffusion length. The model also shows that a device with a non-uniform doping distribution along the active layer is in all equivalent, at low drain voltages, to a device with the same doping averaged over the active layer length. These results highlight a new aspect of the NBIS mechanism, that is, the dependence of the effect upon the relative magnitude of photogenerated holes and electrons, which is controlled by the device potential/band profile. They may also provide the basis for device design solutions to minimize NBIS.

Electron-beam-evaporated thin films of hafnium dioxide for fabricating electronic devices

Thin films of hafnium dioxide (HfO2) are widely used as the gate oxide in fabricating integrated circuits because of their high dielectric constants. In this paper, the authors report the growth of thin films of HfO2 using e-beam evaporation, and the fabrication of complementary metal-oxide semiconductor (CMOS) integrated circuits using this HfO2 thin film as the gate oxide. The authors analyzed the thin films using high-resolution transmission electron microscopy and electron diffraction, thereby demonstrating that the e-beam-evaporation-grown HfO2 film has a polycrystalline structure and forms an excellent interface with silicon. Accordingly, the authors fabricated 31-stage CMOS ring oscillator to test the quality of the HfO2 thin film as the gate oxide, and obtained excellent rail-to-rail oscillation waveforms from it, denoting that the HfO2 thin film functioned very well as the gate oxide.

Large scale integration of flexible non-volatile, re-addressable memories using P(VDF-TrFE) and amorphous oxide transistors

Ferroelectric polymers and amorphous metal oxide semiconductors have emerged as important materials for re-programmable non-volatile memories and high-performance, flexible thin-film transistors, respectively. However, realizing sophisticated transistor memory arrays has proven to be a challenge, and demonstrating reliable writing to and reading from such a large scale memory has thus far not been demonstrated. Here, we report an integration of ferroelectric, P(VDF-TrFE), transistor memory arrays with thin-film circuitry that can address each individual memory element in that array. n-type indium gallium zinc oxide is used as the active channel material in both the memory and logic thin-film transistors. The maximum process temperature is 200 °C, allowing plastic films to be used as substrate material. The technology was scaled up to 150 mm wafer size, and offers good reproducibility, high device yield and low device variation. This forms the basis for successful demonstration of...

High performance electric-double-layer amorphous IGZO thin-film transistors gated with hydrated bovine serum albumin protein

Publication date: September 2015 Source:Organic Electronics, Volume 24 Author(s): Shih-Han Chen , Hung-Chuan Liu , Chun-Yi Lee , Jon-Yiew Gan , Hsiao-Wen Zan , Jenn-Chang Hwang , Yi-Yun Cheng , Ping-Chiang Lyu Device performance of amorphous indium gallium zinc oxide (a-IGZO) thin film transistors (TFTs) has been improved greatly by using bovine serum albumin (BSA) as the top gate dielectric. BSA is a natural protein with acidic and basic amino acid residues, which is easily hydrated in air ambient. A typical a-IGZO TFT with hydrated BSA as the top gate dielectric exhibits a field-effect mobility (μ FE) value of 113.5cm2 V−1 s−1 in saturation regime and a threshold voltage (V TH) value of 0.25V in air ambient. The excellent device performance can be well explained by the formation of electric double layers (EDLs) near the interfaces of a-IGZO/hydrated BSA and hydrated BSA/gate electrode. The reliability issue of a-IGZO TFTs gated with hydrated BSA has been also investigated by using the life time test without encapsulation. The V TH value increases and μ FE,sat value reduces slightly for the a-IGZO TFT and remain stabilized over 60days. Graphical abstract

Analytical surface-potential compact model for amorphous-IGZO thin-film transistors

We present a compact model based on surface potential for amorphous-InGaZnO thin-film transistors, built using multiple trapping and detrapping theory. Using this model, the surface potential can be calculated analytically, so it can be used to rapidly determine the transistor characteristics during circuit simulation. We verified the proposed model using both numerical simulation and experiment, showing that the model is accurate over a wide range of operation regions. The model also provides a physics-based consistent description of DC and AC device characteristics and enables accurate design of amorphous InGaZnO thin-film transistor circuits.