Monthly Archives: April 2014

Controlling the surface wettability of the polymer dielectric for improved resolution of inkjet-printed electrodes and patterned channel regions in low-voltage solution-processed organic thin film transistors

J. Mater. Chem. C, 2014, Accepted ManuscriptDOI: 10.1039/C4TC00343H, PaperWei Tang, Linrun Feng, Chen Jiang, Guangyu Yao, Jiaqing Zhao, Qingyu Cui, Xiaojun GuoA facile method for realizing both inkjet printed electrodes with improved resolution and patterned semiconductor islands was developed to fabricate all solution processed low-voltage organic thin film transistors (OTFTs). By...The content of this RSS Feed (c) The Royal Society of Chemistry

Passivation effect on gate-bias stress instability of carbon nanotube thin film transistors

A prior requirement of any developed transistor for practical use is the stability test. Random network carbon nanotube-thin film transistor (CNT-TFT) was fabricated on SiO2/Si. Gate bias stress stability was investigated with various passivation layers of HfO2 and Al2O3. Compared to the threshold voltage shift without passivation layer, the measured values in the presence of passivation layers were reduced independent of gate bias polarity except HfO2 under positive gate bias stress (PGBS). Al2O3 capping layer was found to be the best passivation layer to prevent ambient gas adsorption, while gas adsorption on HfO2 layer was unavoidable, inducing surface charges to increase threshold voltage shift in particular for PGBS. This high performance in the gate bias stress test of CNT-TFT even superior to that of amorphous silicon opens potential applications to active TFT industry for soft electronics.

Investigation of defects in In–Ga–Zn oxide thin film using electron spin resonance signals

In–Ga–Zn oxide (IGZO) is a next-generation semiconductor material seen as an alternative to silicon. Despite the importance of the controllability of characteristics and the reliability of devices, defects in IGZO have not been fully understood. We investigated defects in IGZO thin films using electron spin resonance (ESR) spectroscopy. In as-sputtered IGZO thin films, we observed an ESR signal which had a g-value of g = 2.010, and the signal was found to disappear under thermal treatment. Annealing in a reductive atmosphere, such as N2 atmosphere, generated an ESR signal with g = 1.932 in IGZO thin films. The temperature dependence of the latter signal suggests that the signal is induced by delocalized unpaired electrons (i.e., conduction electrons). In fact, a comparison between the conductivity and ESR signal intensity revealed that the signal's intensity is related to the number of conduction electrons in the IGZO thin film. The signal's intensity did not increase with oxygen vacancy alone but also with increases in both oxygen vacancy and hydrogen concentration. In addition, first-principle calculation suggests that the conduction electrons in IGZO may be generated by defects that occur when hydrogen atoms are inserted into oxygen vacancies.

Investigation of LaAlO<sub>3</sub>/ZrO<sub>2</sub>/ a -InGaZnO thin-film transistors using atmospheric pressure plasma jet

Amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZOTFTs) with the LaAlO3/ZrO2 gate dielectric stack employing a novel atmospheric pressure plasma jet process that results in small subthreshold swing and low threshold voltage are proposed and fabricated. The influence of post-deposition annealing (PDA) temperature on LaAlO3/ ZrO2 gate dielectric stack and device performance was investigated. The equivalent oxide thickness of the LaAlO3/ZrO2 dielectric stack decreases from 11.5 nm without annealing to 7 nm after a 500°C annealing was applied. The LaAlO3/ZrO2 a-InGaZnO TFT with a 500°C annealing exhibits a small subthreshold swing of 77 mV??dec-1, a high field-effect mobility of 9 cm2 ??V-1 ??s-1 and an excellent current ratio of 1.8 x 107, which could be attributed to the improved gate dielectric quality by the PDA. The LaAlO3/ZrO2/a- InGaZnO TFTs with excellent gate control ability allow the device to operate at a low operating voltage with low power consumption.

TFT-based, multi-stage, active pixel sensor for alpha particle detection

A multi-stage thin film transistor (TFT)-based active pixel sensor (APS), capable of successfully detecting small impulses of charge resulting from incident alpha particle strikes, is presented. Detection of alpha particles is important in the field of neutron detection, where fully integrated thin-film-based detectors are an attractive alternative to conventional 3He-based proportional counters owing to their low-cost and large-area scaling capability, combined with the use of readily available materials. A typical TFT process, however, produces only N-type devices with low electron mobilities ?? making high-gain CMOS amplifier designs unfeasible. The disadvantages of using a TFT-only APS design are mitigated by cascading multiple low-gain TFT amplifiers, which results in a higher overall pixel gain ?? subsequently allowing for the successful detection and readout of alpha particle strikes. Presented is a new APS fabricated in an indium gallium zinc oxide TFT process is presented, and successful initial alpha response measurements are reported.

InAs nanowire MOSFET differential active mixer on Si-substrate

An active single balanced down-conversion mixer is implemented using InAs nanowire metal oxide semiconductor field effect transistors (MOSFETs) as both active devices and passive resistive loads. Circuits with 6 dB low-frequency voltage gain and a 3 dB bandwidth of 2 GHz are measured for a DC power consumption of 3.8 mW from a 1.5 V supply. The circuits are fabricated using contacts made with 12 μmline- width optical lithography.

Boost Up Mobility of Solution-Processed Metal Oxide Thin-Film Transistors via Confining Structure on Electron Pathways

Novel structure-engineered amorphous oxide semiconductor thin-film transistors using a solution process to overcome the trade-off between high mobility and other parameters (i.e., on/off ratio, sub-threshold voltage swing, threshold voltage, and so on) are proposed. High performance confining structure-engineered AOS TFTs are successfully demonstrated, which utilize a specially designed layer with ultra-high density and high electron mobility.

Investigation of oxidation process in self-terminating gate recess wet etching technique for AlGaN/GaN normally-off MOSFETs

A self-terminating gate recess wet etching technique with thermal oxidation of the AlGaN/GaN layer followed by etching in potassium hydroxide (KOH) solution was recently proposed by the present authors for normally-off AlGaN/GaN metal–oxide semiconductor field effect transistors (MOSFETs). In this present reported work, the oxidation process inside the AlGaN/GaN heterostructure involved in this technique was analysed using several material characterisation methods. The measurement results show that the concentration and depth of the O element distribution increase with increased thermal oxidation temperature. It is worth noting that after 650°C oxidation almost no O element could be found in the GaN layer and the O element mainly locates in the AlGaN layer with an obvious correlation between the distribution of Al and O elements, where the Al(Ga)-oxide was detected by X-ray photoelectron spectroscopy, which could be etched by 70°C KOH. Thus, self-terminating wet etching on the AlGaN/GaN material is achieved.

Measurement and application of vertical inductors in high-speed broadband circuit

The measurement results and a practical application of vertical inductors (VIs) are presented. VIs are on-chip inductors designed to save chip area. In VI the spiral plane is oriented perpendicularly with respect to the substrate. An inductance of 318 pH with a self-resonance frequency of 66.5 GHz is implemented in a 130 nm bipolar complementary metal–oxide semiconductor (BiCMOS) technology and results are compared with three-dimensional (3D) planar EM (ground–signal–ground) simulations. The inductance per unit area is 424 nH/mm2, more than 1.7 times higher than other simulated spiral horizontal inductors. Moreover, VIs have been applied in the design of a broadband amplifier leading to a 25% bandwidth enhancement.

1 ppm/°C bandgap with multipoint curvature-compensation technique for HVIC

A high-order curvature-compensated current mode bandgap reference (BGR) over a very wide temperature range is presented. High-order curvature correction for this reference is accomplished by the proposed multipoint corrected technique, which realises exponential curvature-compensation terms in lower and higher temperature ranges separately through simple structures. The compact multipoint curvature-compensation circuit cancels out the nonlinear terms of the BGR using sub-threshold operated metal–oxide semiconductor field effect transistors, which subtract those currents that are proportional to the nonlinearity out of the reference voltage. As a result, a flattened and better effect of curvature compensation in a wide temperature range is realised. The circuit performance was verified experimentally. The measurements indicate that the proposed BGR can achieve a temperature coefficient as low as 1.01 ppm/°C over the temperature range of 160°C (−40 to 120°C).